1. Field of the Invention
The present invention generally relates to a method and an apparatus for polishing a semiconductor wafer. More specifically, the present invention relates to a method and an apparatus for polishing a wafer level semiconductor device such as a wafer level chip size package, which will hereinafter referred to as W-CSP.
2. Background Information
All patents, patent applications, patent publications, scientific articles, and the like, which will hereinafter be cited or identified in the present application, will, hereby be incorporated by reference in their entirety in order to describe more fully the state of the art to which the present invention pertains.
In a series of manufacturing processes for a semiconductor device, a back-side polishing so called “back-grind” may be performed to polish a back-surface of a semiconductor wafer prior to dicing the wafer. This back-surface of the wafer is opposite a front-surface that has an integrated circuit that includes the semiconductor device.
In the manufacturing processes, an encapsulation process may be performed for encapsulating the wafer level semiconductor device with an encapsulation resin to form an encapsulated semiconductor package that is incomplete as a product. This incomplete package is then polished to have a required thickness and produce the W-CSP as the product.
The polishing process is also performed using a moveable polishing pad that polishes the semiconductor wafer surface. The polishing pad descends and contacts with the wafer surface for polishing the same. The polishing pad descends or moves closer to the wafer under a descending-speed control.
Japanese Laid-Open Patent Publication No. 9-155722 discloses a conventional process for polishing the semiconductor wafer and a conventional chemical mechanical polishing (CMP) apparatus therefor. The conventional apparatus includes a polishing cloth made of a highly rigid material, a suction table positioned over the polishing cloth, and a sensor positioned over the suction table. The suction table has a downward face that holds the semiconductor wafer thereon. The suction table is also movable up and down. The suction table presses the wafer to the polishing cloth for polishing the wafer with the polishing cloth. As the polishing process progresses, the suction table descends slowly and slightly. The sensor detects a displacement of the suction table. Further, such a highly rigid polishing cloth prevents the wafer from downwardly sinking into the polishing cloth. Both the high rigidity of the polishing cloth and the detection of the displacement allow for highly accurate control of the polishing amount.
Further description will be made of another conventional descending-speed control method involved in the polishing process. A polishing pad descends, at a higher descending-speed, from a stand-by position to a predetermined interposition A′ between the stand-by positioned and the wafer surface. At the interposition A′, a reduction in the higher descending-speed commences and continues until the pad has a predetermined lower descending-speed, which is the speed at which the polishing pad contacts the polishing surface of the wafer. The above reduction of the descending-speed relaxes impact force of a collision between the polishing pad and the wafer, thereby avoiding or reducing possible impact damage to the wafer. When the polishing pad has just polished the wafer by a predetermined thickness or amount that is less than a finally required polishing-amount, the polishing pad is positioned at a polishing-halfway-position B′ where a change or increase in the descending-speed from the lower descending-speed is commenced to allow the polishing pad to perform further the remaining polishing process at the increased descending-speed.
In accordance with the conventional method, the above interposition A′, at which the above speed reduction is commenced, can be determined by taking into account unavoidable variation in the actual thickness of the unpolished wafer. The interposition A′ is set based on a sum of a given initial thickness value T1′ and a first compensation value α′, so that a relation A′=T1′+α′ is established, where T1′ and α′ are constant, respectively. Thus, the above interposition A′ is also fixed and given commonly to various actual thicknesses of the unpolished wafers. The fixed interposition A′ and the unavoidable variation of the actual wafer thickness cause undesired variation in a first actual distance that is defined between the unpolished wafer surface and the fixed interposition A′.
If the actual thickness of the unpolished wafer is greater than the given initial thickness value T1′, then the first actual distance is shorter than a first necessary distance for avoiding or reducing possible impact damage to the wafer. This causes the polishing pad to reach the polishing wafer surface at an insufficiently reduced speed that is still higher than the above-described desired lower descending-speed, resulting in possible impact damage to the wafer. If the actual thickness of the unpolished wafer is smaller than the given initial thickness value T1′, then the actual distance is longer than the above-described necessary distance. This may avoid any possible impact damage to the wafer, but causes unnecessary time consumption during descent or moving down of the pad at the lower descending-speed before the polishing pad reaches the polishing wafer surface. In this point of view, it is desired that the actual thickness of the unpolished wafer is smaller than the given initial thickness value T1′.
The polishing-halfway-position B′, at which the above speed increase is commenced, is set based on a sum of a finally required target thickness value T2′ and a second compensation value β′, so that another relation B′=T2′+β′ is established, where T2′ and β′ are constant, respectively. Thus, the above polishing-halfway-position B′ is also fixed and commonly given to various actual thicknesses of the unpolished wafers. The fixed polishing-halfway-position B′ and the unavoidable variation of the actual wafer thickness cause undesired variation in a second actual distance that is defined between the unpolished wafer surface and the fixed polishing-halfway-position B′.
If the actual thickness of the unpolished wafer is greater than the given initial thickness value T1′, then the polishing pad polishes the wafer at the lower descending-speed by a sufficient thickness to avoid or to reduce any impact damage to the wafer before the polishing pad reaches the polishing-halfway-position B′, and the descending-speed is increased. If the actual thickness of the unpolished wafer is smaller than the given initial thickness value T1′, then the polishing pad polishes the wafer at the lower descending-speed by a smaller thickness than the above sufficient thickness before the polishing pad reaches the polishing-halfway-position B′, and the descending-speed is increased. To avoid or to reduce any impact damage to the wafer, it is desired that the polishing pad polishes the wafer at the lower descending-speed until cutting blades of the polishing pad are well-engaged into the wafer surface and the polishing process is stabilized. In this point of view, it is desired that the actual thickness of the unpolished wafer is greater than the given initial thickness value T1′.
Consequently, any substantive variations in the actual thickness of the unpolished wafer from the given initial thickness value T1′ causes either one of the above two disadvantages.
In accordance with the CMP apparatus disclosed in the above-described Japanese publication, the sensor detects the displacement of the suction table in order to monitor the polishing amount and then control the polishing process based on the monitored polishing amount. It should be noted that the CMP apparatus does not control the descending-speed of the suction table.
In the above-described circumstances, it had been desired to establish or to develop a certain polishing technique free from the above disadvantages caused by the unavoidable variation in the actual thickness of the wafer.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved a method and an apparatus for polishing a semiconductor device. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.